Cadence入門（二）plot漏電流和柵源電壓之間的關係圖

寫在前面的話：這篇講Cadence的入門。請各位牛人們不要浪費時間看這篇了哈！

接著上次的課程介紹：這次講講如何plot漏電流和柵源電壓之間的關係圖。

Exercisen1B: Plot of Drain Current with Gate-to-Source Voltage

1.nIn the Analog Design Environmentnwindow, double click on the highlighted shown below.

2. Make the changes to the fields suggested shown below. Press OK.

3.nIn the Analog Design Environmentnwindow, click on the Netlist and Runnbutton shown by the rectangle below.

4.nThe graph of drain current plotted with gate-to-source voltage will appear asnshown.

Wonderful!nNow, there is a homeJOY for you. Donobtain the family of curves when a parametric simulation is run for varying thenvalues of body-to-source voltages. Pay attention to the changes to threshold voltage. The body-to-sourcenvoltage is taken to be zero for the simulation done above.

Takennote: The threshold voltage changes with varying body-to-source voltage.

5.nIf you make the appropriate changes to the circuit and run the correctnparametric simulation, you will get the family ofncurves shown below:

Well Done!nYou had completed the whole exercise on the characterization of NMOS device. However,nif you cannot obtain the family of curves above or you have only 0.0001% of query,ndo ask your teaching assistant for advice and assistance. He is a wonderful person. I amnnot kidding with you. Never leave your doubts overnight.

Important Advice:

1. When you press the delete button on your keyboard, your mouse will always be in the delete mode. Now, if you press w for wiring, your mouse will STILL be in delete mode. So, you have to press the ESC button to neutralise your mousenbefore pressing w for the wiring mode.

2. In the schematicnwindow, always REMEMBER to save yournschematic by pressing Shift and xntogether. Otherwise, your simulation WILLnnot run.

Exercise 2: Characterizationnof PMOS Device

For this exercise, I will not guide younstep-by-step. Do not be worried or upset. I strongly believe that the best waynto learn Cadence tools is to keep doing and keep trying. However, no worries, Inwill always be around to assist YOUnwhenever you need any advice and assistance.

Likenthe saying goes: You Never Walk Alone.

Do create a new Cell View: Lab_2_PMOS.

There are 4ngraphs to be plotted for this lab exercise:

· DrainnCurrent with Drain-to-Source voltage

DrainnCurrent with Drain-to-Source voltage - varying gate-to-source voltage(parametric)

DrainnCurrent with Gate-to-Source voltage

DrainnCurrent with Gate-to-Source voltage - varying body-to-source voltage(parametric)

Students are encouraged to check withnthe lab professor or teaching assistant to confirm that they had obtained thencorrect graph.

TakenNote: The model name of PMOS is epm which can be found in xx library. （你所用的對應library里的pmos名稱）

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